ADRV9029

推荐新设计使用

带有观测路径的集成式四通道RF收发器

产品技术资料帮助

ADI公司所提供的资料均视为准确、可靠。但本公司不为用户在应用过程中侵犯任何专利权或第三方权利承担任何责任。技术指标的修改不再另行通知。本公司既没有含蓄的允许,也不允许借用ADI公司的专利或专利权的名义。本文出现的商标和注册商标所有权分别属于相应的公司。

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产品详情

  • 4 个差分变送器
  • 4 个差分接收器
  • 2 个观察接收器,各带 2 个输入
  • 中心频率:75 MHz 至 6000 MHz
  • 完全集成的 DPD 自适应引擎,用于功率放大器的线性化
  • 削峰 (CFR) 引擎
  • 最大接收器带宽:200 MHz
  • 最大变送器大信号带宽:200 MHz
  • 最大变送器合成带宽:450 MHz
  • 最大观察接收器带宽:450 MHz
  • 完全集成的独立小数 N 射频频率合成器
  • 完全集成的时钟频率合成器
  • 适用于所有本地振荡器和基带时钟的多芯片相位同步
  • 支持 TDD 和 FDD 应用
  • 24.33 Gbps JESD204B/JESD204C 数字接口
ADRV9029
带有观测路径的集成式四通道RF收发器
ADRV9029 ADRV9029 Functional Block Diagram ADRV9029 Pin Configuration
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软件资源


工具及仿真模型

设计工具 1

ADIsimRF

ADIsimRF是一款简单易用的RF信号链计算工具。可以计算和导出多达50级的信号链级联增益、噪声、失真和功耗并绘制其曲线。ADIsimRF还包括丰富的ADI射频和混合信号元件的器件模型数据库。

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评估套件

EVAL-ADRV9029

ADRV902x Sub6GHz Development Platform

特性和优点

  • Complete 4T4R Radio Development Kit
    • 4 x Transmit channels with PA Pre-driver stage HMC625B/ADL5611 which can directly drive small cell and Massive MIMO PAs (up to 5W)
    • 4 x Receiver channels with Dual Channel LNA/switches ADRF5545/9 on receiver inputs
    • 4 x Observation Receiver inputs
  • Dual domain ADI clocking solution based on AD954x and clock buffer AD9508
    • Compatible design of sync E capability or IEEE1588
  • Power Supply solution with high efficiency based on ADP5054
  • Multiple FPGA platforms supported
    • Works with either Intel Arria-10 EVB or ADI ADS9 board
    • Integrate the DPD/CFR/CLGC verification interface in evaluation software
  • Includes schematics, layout, BOM, API, evaluation software, and user guide

产品详情

The ADRV9029 is a high-performance low-power 4T4R2O RF Transceiver with DFE features, designed for cellular infrastructure applications such as Small Cell, Macro and Massive MIMO base stations.

The ADRV9029 Sub6G EBZ is a RF Development Kit for small cell O-RAN, and other radio applications based on the ADRV9029. The Development Kit integrates various radio front end products, gain blocks, high performance clocking and power components. This lets customers quickly evaluate their PA performance with the integrated DPD/CFR in AD9029, confirm the whole radio chain performance, and validate their FPGA design. The radio card can connect to either Intel Arria-10 EVB or ADI ADS9-V2EBZ FPGA motherboard through the FMC connector to form a complete Radio Eval or Development platform. The Intel Arria-10 FPGA also provides related DDC/DUC/JESD/CPRI reference software to work with this RF Development Kit.

To support various RF bands in a single board, the Development Kit optimizes different Tx/Rx channels for different RF bands. On Channel 1 and 2, the transceiver ports RF matching are optimized for 2800~6000MHz; for Channel 3 and 4 RF matching are optimized for 650~2800MHz. Correspondingly, two different RF Front End products are also selected to support best performance for 2800~6000MHz high band and 650~2800MHz middle band. The user can decide which RF channels they would like for RF performance optimization and DPD performance evaluation based on project needs.

The table below details the RF working range of each channel.

Channel Working Range of ADRV9029 RF Matching Working Range of RF Front End Components Overall Working Range
TX1 2800~6000MHz DC~5000MHz 2800~5000MHz
TX2 2800~6000MHz 30~6000MHz 2800~6000MHz
TX3 650~2800MHz 30~6000MHz 650~2800MHz
TX4 650~2800MHz DC~5000MHz 650~2800MHz
RX1/RX2 2800~6000MHz 2400~4200MHz 2800~4200MHz
RX3/RX4 650~2800MHz 1800~2800MHz 1800~2800MHz
ORX1/ORX2 2800~6000MHz - 2800~6000MHz
ORX3/ORX4 650~2800MHz - 650~2800MHz

eval board
ADS9-V2EBZ

ADS9-V2EBZ 评估板

特性和优点

Xilinx Kintex Ultrascale+ XCKU15P-2FFVE1517E FPGA。

  • 一 (1) 个 FMC+ 连接器。
  • (20) 个 28 Gbps 收发器,由一 (1) 个 FMC+ 连接器提供支持
  • HMC DRAM
  • 简单 USB 3.0 端口接口。
  • 随附两张微型 SD 卡,“TRX”用于 ADRV9026 评估板,“HSX”用于 MxFE™ 评估板。

产品详情

当连接到指定的 ADI 公司高速转换器评估板时,ADS9-V2EBZ 可作为数据采集/发射板。ADS9-V2EBZ 上的 FPGA 旨在支持较高速度的 JESD204B/C 数据转换器,可用作高速 ADC 的数据接收器,也可用作高速 DAC 的发射器。

EVAL-ADRV9029
ADRV902x Sub6GHz Development Platform
ADS9-V2EBZ
ADS9-V2EBZ 评估板
ADS9-V2EBZANGLE-web ADS9-V2EBZBOTTOM-web ADS9-V2EBZTOP-web

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