産業用ワイヤレス・コネクティビティ技術

SmartMesh IP wireless sensor networks are self managing, low power internet protocol (IP) networks built from wireless nodes called motes. The LTC5800-IPM is the SmartMesh IP integrated circuit in the Eterna^® family of IEEE 802.15.4e System-on-Chip (SoC) solutions, featuring a highly integrated, low power radio design as well as an ARM Cortex-M3 32-bit microprocessor running SmartMesh IP embedded networking software.

With SmartMesh IP time-synchronized networks, all motes in the network may route, source or terminate data, while providing many years of battery powered operation. SmartMesh IP is a highly flexible network with proven reliability and low power performance in an easy-to-integrate platform.

The LTC5800-IPM’s behavior in a SmartMesh IP network is determined by the choice of SmartMesh IP network software loaded: Wireless Mote, EManager, or Access Point Mote in a SmartMesh IP network. The SmartMesh IP software provided with the LTC5800-IPM is fully tested and validated, and is readily configured via a software Application Programming Interface. Once you have purchased SmartMesh IP products, the SmartMesh IP stack binaries may be downloaded via your myAnalog account.

The pin signaling behavior of the LTC5800*WR-IPMA hardware is determined by the software loaded and is described in detail in the following product datasheets:

Applications

SmartMesh IP is ideally suited for wireless Industrial Internet of Things (IoT) applications.

Learn more about SmartMesh applications.

SmartMesh IP wireless sensor networks are self managing, low power internet protocol (IP) networks built from wireless nodes called motes. The LTP5901-IPM is printed circuit board assembly (PCBA) product with on-board chip antenna in the Eterna^® family of IEEE 802.15.4e solutions, featuring a highly integrated, low power radio design as well as an ARM Cortex-M3 32-bit microprocessor running SmartMesh IP embedded networking software. The LTP5901-IPM, at 24mm × 42mm, is built for surface-mount assembly.

With SmartMesh IP time-synchronized networks, all motes in the network may route, source or terminate data, while providing many years of battery powered operation. SmartMesh IP is a highly flexible network with proven reliability and low power performance in an easy-to-integrate platform.

The LTP5901-IPM’s behavior in a SmartMesh IP network is determined by the choice of SmartMesh IP network software loaded: Wireless Mote, EManager, or Access Point Mote in a SmartMesh IP network. The SmartMesh IP software provided with the LTP5901-IPM is fully tested and validated, and is readily configured via a software Application Programming Interface. Once you have purchased SmartMesh IP products, the SmartMesh IP stack binaries may be downloaded via your myAnalog account.

The pin signaling behavior of the LTP5901IPC-IPMA hardware is determined by the software loaded and is described in detail in the following product datasheets:

Network Features

Device Features

Applications

SmartMesh IP is ideally suited for wireless Industrial Internet of Things (IoT) applications. Learn more about SmartMesh applications.

SmartMesh WirelessHART wireless sensor networks are self managing, low power networks built from wireless nodes called motes. The LTP5902-WHM is the SmartMesh WirelessHART mote product in the Eterna^® family of IEEE 802.15.4 printed circuit board assembly solutions, featuring a highly-integrated, low power radio design by Analog Devices as well as an ARM Cortex-M3 32-bit microprocessor running Analog Devices' embedded SmartMesh WirelessHART networking software. The LTP5902-WHM includes an MMCX antenna connector and comes with modular RF certifications. Also available are the LTC5800-WHM Mote-on-Chip and the LTP5901-WHM module which includes an onboard chip antenna.

With Analog Devices' time-synchronized SmartMesh WirelessHART networks, all motes in the network may route, source or terminate data, while providing many years of battery powered operation. The SmartMesh WirelessHART software provided with the LTP5901-WHM is fully tested and validated, and is readily configured via a software Application Programming Interface (API).

SmartMesh WirelessHART motes deliver a highly flexible network with proven reliability and low power performance in an easy-to-integrate platform.

Network Features

Device Features

Applications

Learn more about SmartMesh applications.

SmartMesh WirelessHART wireless sensor networks are self managing, low power networks built from wireless nodes called motes. Based on the WirelessHART (IEC62591) standard, the LTP5903-WHR runs SmartMesh WirelessHART network management software to monitor and manage network performance and provide a data ingress/egress point via a UART interface. It provides the core networking functionality, enabling the network to achieve unsurpassed levels of resilience, reliability, and scalability with advanced network management and comprehensive security features.

The LTP5903-WHR is designed for use in line-powered gateways and controllers, such as WirelessHART Gateways, and enables customers to integrate a standards-based wireless sensor network that provides scalable bidirectional communications.

The embedded network manager offers a comprehensive software application programming interface (API) to deliver rich and flexible functionality without complex coding. This API also provides full visibility and control over network configuration, security administration, network status, and performance statistics. The network-ready embedded manager enables industrial automation vendors to integrate advanced wireless sensor networking intelligence into monitoring and control solutions with low risk and rapid time-to-market.

The MAX32655 microcontroller (MCU) is an advanced system-on-chip (SoC) featuring an Arm^® Cortex^®-M4F CPU for efficient computation of complex functions and algorithms that is qualified to operate at a temperature range of -40°C to +105°C. The SoC integrates power regulation and management with a single inductor multiple-output (SIMO) buck regulator system. The latest generation Bluetooth^® 5.2 Low Energy (LE) radio is on board, supporting long-range (coded) and high-throughput modes and medical body area network (MBAN).

The device offers large onboard memory with 512KB flash and 128KB SRAM, with optional error correction coding (ECC) on one 32KB SRAM bank. This 32KB bank can be optionally retained in BACKUP mode. An 8KB user OTP area is available.

The MAX32655 supports multiple high-speed peripherals, such as I²C, 50MHz SPI, and UART, plus one I²S port for connecting to an audio codec. An eight-input, 10-bit ADC is available to monitor analog input from external analog sources. In addition, a low-power UART (LPUART) is available for operation in the lowest power sleep modes to facilitate wake-up activity without any data loss. A total of six timers with I/O capability are provided, including two low-power timers to enable pulse counting, capture/compare, and pulse-width modulation (PWM) generation, even in the lowest power sleep modes.

The MAX32655 is available in two different packages:

• 81 CTBGA package (8mm × 8mm, 0.8mm pitch).
• 51 WLP (3.09mm × 3.09mm, 0.35mm pitch)

Applications

• Asset Tracking
• Fitness/Health and Medical Wearables
• Hearables
• Industrial Sensors
• Wireless Computer Peripherals and I/O Devices

DARWIN is a new breed of low-power microcontrollers built to thrive in the rapidly evolving Internet of Things (IoT). They are smart, with the biggest memories in their class and a massively scalable memory architecture. They run forever, thanks to wearable-grade power technology. They are durable enough to withstand the most advanced cyberattacks. DARWIN microcontrollers are designed to run any application imaginable—in places where you would not dream of sending other microcontrollers.

Generation UB microcontrollers are designed to handle the increasingly complex applications demanded by today's advanced battery-powered devices and wirelessly connected devices, while providing robust hardware security and Bluetooth^® 5 Low Energy (Bluetooth LE) radio connectivity.

The MAX32665/MAX32666 UB class microcontrollers are advanced systems-on-chips featuring an Arm^® Cortex^®-M4 with FPU CPU for efficient computation of complex functions and algorithms with integrated power management. They also include the newest generation Bluetooth 5 LE radio with high throughput (2Mbps) and ADI's best-in-class hardware security suite trust protection unit (TPU). The devices offer large on-board memory with 1MB flash and 560KB SRAM. Split flash banks of 512KB each support seamless over-the-air upgrades, adding an additional degree of reliability. Memory scalability of data (SRAM) and code (flash) space is supported by two SPI execute-in-place (SPIX) interfaces.

Multiple high-speed interfaces are supported including HS-USB, secure digital interface (SD, SDIO, MMC, SDHC, and microSD™), SPI, UART, and I²C serial interfaces, and an audio subsystem supporting PDM, PCM, I²S, and TDM interfaces. An 8-input, 10-bit ADC is available to monitor analog inputs from external sensors and meters. The devices are available in 109-bump WLP (0.35mm pitch) and 121-bump CTBGA (0.65mm pitch).

Applications

• Connected Home
• Gaming Devices
• Hearables
• Industrial Sensors
• Payment/Fitness/Medical Wearables
• Telemedicine

The MAX32690 microcontroller (MCU) is an advanced system-on-chip (SoC) featuring an Arm® Cortex®-M4F CPU, large flash and SRAM memories, and the latest generation Bluetooth® 5.2 Low Energy (LE) radio. This device unites processing horsepower with the connectivity required for IoT applications.

The MAX32690 is qualified to operate over the -40°C to +105°C range, which is ideal for industrial environments.This device is available in a 68-pin TQFN-EP (0.40mmpitch) and a 140-bump WLP (0.35mm pitch).

Bluetooth 5.2 Low Energy (LE) radio supports Mesh, angle of arrival (AoA), and angle of departure (AoD) for direction finding, long-range (coded), and high-throughput modes. LE Audio hardware implemented with software codec is provided separately. A RISC-V core optionally handles timing-critical controller tasks, freeing the programmer from Bluetooth LE interrupt latency concerns.

A cryptographic toolbox (CTB) provides advanced security features, including an MAA for fast Elliptic Curve Digital Signature Algorithm (ECDSA), Advanced Encryption Standard (AES) Engine, TRNG, SHA-256 hash, and secure boot loader. Internal code and SRAM space can be expanded off-chip through two quad-SPI execute-in-place (SPIXF and SPIXR) interfaces up to 512MB each.

Many high-speed interfaces are supported on the device, including multiple QSPI, UART, CAN 2.0B, and I2C serial interfaces, plus one I²S port for connecting to an audio codec. All interfaces support efficient DMA-driven transfers between peripheral and memory. A 12-input (8 external), 12-bit SAR ADC samples analog data at up to 1Msps.

Applications

• Fitness/Health Wearables
• Portable and Wearable Wireless Medical Devices
• Asset Tracking
• Industrial Sensors and Networks

The ADMV9611 is a complete millimeterwave (mmWave) wireless connectivity solution in a small printed circuit assembly (PCA) format. All millimeterwave signals are confined to the printed circuit assembly, simplifying implementation. Wireless transmission is achieved using the integrated circularly polarized (CP) omnidirectional patch antenna array, which enables communication in many applications, including rotation. Following the antenna array is an integrated diplexer that provides isolation between the separate transmit and receive paths on the board, which reduces multipath distortion. The receive path integrates all components to demodulate the 58.0125 GHz frequency to baseband signals. The flexible receiver gain control is programmable over a wide range to easily accommodate the required link budget. The receiver baseband outputs are dc-coupled and can provide over 500 mV of differential output signal level. Likewise, the transmit path integrates all components to modulate input baseband signals to 63 GHz. The transmitter has programmable gain control to maintain level transmit power. The transmit baseband inputs are dc-coupled and have a broad common-mode input range. Synthesizers are integrated to maintain excellent frequency stability vs. temperature. The simple amplitude modulation (AM) scheme eliminates the need for external data converters, allowing for bit rates of greater than 100 Mbps. On-board power management is integrated to a single 5 V voltage rail to power the ADMV9611.

Together with the ADMV9621, the ADMV9611 provides a complete, full duplexed 60 GHz data link for high speed data transmission in the unlicensed 60 GHz industrial, scientific, and medical (ISM) band.

APPLICATIONS

The ADMV9621 is a complete millimeterwave (mmWave) wireless connectivity solution in a small printed circuit assembly (PCA) format. All millimeterwave signals are confined to the printed circuit assembly, simplifying implementation. Wireless transmission is achieved using the integrated circularly polarized (CP) omnidirectional patch antenna array, which enables communication in many applications, including rotation. Following the antenna array is an integrated diplexer that provides isolation between the separate transmit and receive paths on the board, which reduces multipath distortion. The receive path integrates all components to demodulate the 63.0 GHz frequency to baseband signals. The flexible receiver gain control is programmable over a wide range to easily accommodate the required link budget. The receiver baseband outputs are dc-coupled and can provide over 500 mV of differential output signal level. Likewise, the transmit path integrates all components to modulate input baseband signals to 58.0125 GHz. The transmitter has programmable gain control to maintain level transmit power. The transmit baseband inputs are dc-coupled and have a broad common-mode input range. Synthesizers are integrated to maintain excellent frequency stability vs. temperature. The simple amplitude modulation (AM) scheme eliminates the need for external data converters, allowing for bit rates of greater than 100 Mbps. On-board power management is integrated to a single 5 V voltage rail to power the ADMV9621.

Together with the ADMV9611, the ADMV9621 provides a complete full duplexed 60 GHz data link for high speed data transmission in the unlicensed 60 GHz industrial, scientific, and medical (ISM) band.

APPLICATIONS

The ADRV9040 is a highly integrated, system on chip (SoC) radio frequency (RF) agile transceiver with integrated digital front end (DFE). The SoC contains eight transmitters, two observation receivers to monitor transmitter channels, eight receivers, integrated LO and clock synthesizers, and digital signal processing functions. The SoC meets the high radio performance and low power consumption demanded by cellular infrastructure applications including small cell base-station radios, macro 3G/4G/5G systems, and massive MIMO base stations.

The receiver and transmitter signal paths use a zero-IF (ZIF) architecture that provides wide bandwidth with dynamic range suitable for contiguous and non-contiguous multi-carrier base-station applications. The ZIF architecture has the benefits of low power plus RF frequency and bandwidth agility. The lack of aliases and out-of-band images eliminate anti-aliasing and image filters. This reduces both system size and cost, also making band independent solutions possible.

The device also includes two wide-bandwidth observation path receiver subsystems to monitor transmitter outputs. This SoC subsystem includes automatic and manual attenuation control, DC offset correction, quadrature error correction (QEC), and digital filtering. GPIOs that provide an array of digital control options are also integrated.

Multi-band capability is enabled by additional LO dividers and wideband operation. This allows four individuals band profiles within the tunable range, so maximizing use case flexibility.

The SoC has fully integrated DFE functionality, which includes carrier digital up/down conversion (CDUC and CDDC), crest factor reduction (CFR), digital predistortion (DPD), closed-loop gain control (CLGC) and voltage standing wave ratio (VSWR) monitor.

The CDUC feature of the ADRV9040 filters and places individual component carriers within the band of interest. The CDDC feature, with its eight parallel paths, processes each carrier individually before sending over the serial data interface.

The CDUC and CDDC reduce serialization/deserialization (SERDES) interface data rates in non-contiguous carrier configurations. This integration also reduces power compared to an equivalent FPGA based implementation.

The CFR engine of the ADRV9040 reduces the peak-to-average ratio (PAR) of the input signal, which enables higher efficiency transmit line ups while reducing the processing load on baseband processors.

The SoC also contains a fully integrated DPD engine for use in power amplifier linearization. The DPD enables the high-efficiency power amplifiers, which reduce the power consumption of base-station radios and the number of SERDES lanes interfacing with baseband processors. The DPD engine incorporates a dedicated long-term DPD (LT-DPD) block, which provides the support for GaN power amplifiers. The ADRV9040 tackles charge-trapping property of GaN power amplifiers with its LT-DPD block, hence improving the emissions and error vector magnitude (EVM). The SoC includes an ARM Cortex-A55 quad core processor to independently serve DPD, CLGC, and VSWR monitor features. The dedicated processor, together with the DPD engine, provides industry leading DPD performance.

The serial data interface consists of eight serializer and deserializer lanes. The interface supports the JESD204C standards, and both fixed and floating-point data formats are supported. The floatingpoint format allows internal automatic gain control (AGC) to be transparent to the baseband processor.

The ADRV9040 is powered directly from 0.8 V, 1.0 V, and 1.8 V regulators and is controlled through a standard SPI serial port. The comprehensive power-down modes are included to minimize the power consumption in normal use. The device is packaged in a 27 mm × 20 mm, 736-ball grid array.

Applications

• 3G/4G/5G time division duplex (TDD)/frequency division duplex (FDD) small cell, massive MIMO, and macro base stations